The present invention relates to video processing, and more particularly to a method and apparatus for controlling the rate of data production by multiple encoding engines provided to compress video in a television encoder, such as a digital high definition television (HDTV) or standard definition television (SDTV) encoder.
The following references are relevant to this disclosure:                1. Advanced Television Systems Committee (ATSC) A53 Standard entitled “ATSC Digital Television Standard.”        2. ATSC A54 Standard entitled “Guide to the use of ATSC Digital Television Standard.”        3. ISO/IEC 13818-2 “Generic Coding of Moving Pictures and Associated Audio: Video” (MPEG2).        4. ISO/IEC JTC1/SC29/WG11/MPEG93/457 “MPEG2 Test Model 5.”        5. “Rate Control for the Grand Alliance Prototype Encoder,” Siu-Wai Wu, memo distributed to the Grand Alliance Video Compression Specialist Group, November 1994.        
Rate control is an essential part of a video encoder. In an HDTV encoder, the picture is processed using multiple encoding engines for data compression. These multiple encoding engines operate on the picture simultaneously, but share a common data buffer. Thus, the rate at which data is produced by the multiple engines must be carefully regulated in order to prevent buffer overflow, buffer underflow, and other problematic conditions.
In the past, rate control algorithms have been proposed for use in conjunction with a single video compressor. See, e.g., “MPEG2 Test Model 5” referred to above. In the approach adopted by the Grand Alliance for encoding HDTV, the parallel encoding engines are synchronized at the video slice instead of frame level; thus, the rate control can be treated as if only a single compressor were provided. None of the prior art schemes provide a robust solution to the problem of regulating the rate of data production by a plurality of compressors, in order to control the quantization of a digital video encoder that uses parallel compression engines.
It would be advantageous to provide an efficient rate control algorithm to regulate the rate of data production by multiple encoding engines to optimize video quality. It would be further advantageous to implement such an algorithm in the video encoder's existing controller microprocessor. The present invention provides a method and apparatus enjoying these and other advantages.